A. Field of the Invention
The embodiments of the present invention relate to an architecture for improving efficiency of a Class-A power amplifier, and more particularly, the embodiments of the present invention relate to an architecture and method for improving efficiency of a Class-A power amplifier by dynamically scaling biasing current thereof as well as synchronously compensating gain thereof in order to maintain overall constant gain of the Class-A power amplifier at all biasing configurations thereof.
B. Description of the Prior Art
Power amplifiers, which provide driving ability to antennas, are the most power-hungry components of RF transceivers and other mobile applications. Power amplifiers can be either linear, in which a transistor acts as a current source, or nonlinear, in which a transistor acts as a switch. Linear power amplifiers, such as Classes A, AB, and C, depending on the biasing points, preserve amplitude information, while nonlinear power amplifiers, such as Classes E and F, are mainly used to amplify constant envelope signals. In general, linear power amplifiers tend to have high linearity and poor efficiency, while nonlinear power amplifiers tend to have poor linearity and high efficiency (˜100%).
With the fast development of wireless and mobile technologies, many applications employ non-constant envelope modulation, such as QPSK and QAM, to maximize spectrum efficiency, which requires the use of a linear power amplifier. Unfortunately, linear power amplifiers are usually not only less efficient but the efficiency drops rapidly when processing small signals. For example, although the maximum efficiency of a Class-A power amplifier is 50%, its average efficiency is typically less than 5%.1 
1 F. H. Raah et al., “Power Amplifiers and Transmitters for RF and Microwave,” IEEE Transactions on Microwave Theory and Techniques, vol. 50, pp. 814-826, March 2002.
Methods, such as predistortion,2 feedforward,3 and envelope elimination and restoration (EER),4 are utilized to improve linearity and average efficiency. Dawson5 summarized their advantages and disadvantages. Other methods to improve power amplifier efficiency were also discussed.6 2 Y. Zhou et al., “Performance of predistorted APK Modulation for one- and two-link nonlinear power amplifier Satellite communication channels,” Asia-Pacific Microwave Conference, pp. 1139-1142, December 2000.3 W. J. Kim et al., “Ultra performance of the feedforward linear power amplifier using error feedback technique,” IEEE Transactions on Microwave Theory and Techniques, vol. 50, pp. 814-826, March 2005.4 N. Wang et al., “Linearity of X-band Class-B power amplifiers in EER operation,” IEEE Transactions on Microwave Theory and Techniques, vol. 53, pp. 1096-1102, March 2005.5 J. L. Dawson, “Power Amplifier Linearization Techniques: An Overview,” Workshop on RF Circuits for 2.5G and 3G Wireless Systems,” presented at IEEE International Solid-State Circuits Conference, Feb. 4, 2001.6 J. Deng et al., “A high-Efficiency SiGe BICMOS Power Amplifier with Dynamic Current Biasing for Improved Average Efficiency,” Proceedings of the IEEE Radio Frequency Integrated Circuits Symposium, pp. 361-364, 2004; K. Yang et al., “High-Efficiency Class-A Power Amplifier with a Dual-Bias-Control Scheme,” IEEE Transactions on Microwave Theory and Techniques, Vol. 47, No. 8, pp. 1426-1432, August 1999.
The quiescent currents of traditional Class-A power amplifiers are constant, which enables the power amplifiers to have high linearity, but poor efficiency. The power-added efficiency (PAE) is defined as Equation 1:
                              η          PAE                =                                            P              out                        -                          P              in                                                          V              cc                        ⁢                          I              c                                                          (        1        )            
When input power (Pin) decreases, output power (Pout) also decreases due to constant gain. The efficiency drops as VccIc remains unchanged. Hence, when processing small inputs, power amplifiers' efficiency can be improved by reducing either the operation voltage (Vcc), the biasing current (Ic), or both, as indicated in FIG. 1, which is a plot of two orthogonal approaches to increase efficiency. Note that the RF choke can cause peak collector voltage swing up to 2Vcc while keeping the output within the active region. The operation point shifts to the left in the case of reducing Vcc and move downward in the case of reducing Ic—the loadline slope doesn't change if load impedance is unchanged. Scaling Vcc requires the use of a high-speed and highly-efficient DC-to-DC converter,7 which is difficult to implement on the same die. 7 DC-to-DC conversion refers to the technology that allows a power amplifier's power supply voltage (DC) to be adjustable/controllable (at very high frequency) according to dynamic signal strength and conditions.
Thus, there exists a need for an architecture and method for improving efficiency of a Class-A power amplifier by dynamically scaling biasing current thereof as well as synchronously compensating gain thereof in order to maintain overall constant gain of the Class-A power amplifier at all biasing configurations thereof.